The present invention relates to a vector processor suited to process data having the form of a matrix (namely, vector data) at high speed.
Various vector processors have been proposed which can process, at high speed, large-scale matrix calculation frequently appearing in scientific and technical calculation. One of the vector processors includes vector registers and has a chaining function for them, in order to improve the high-speed, parallel processing carried out by a plurality of pipe-line arithmetic units (refer to, for example, U.S. Pat. No. 4,128,880).
In the above vector processor, data stored in a main storage is stored in vector registers, and then transferred to an arithmetic unit. Further, the intermediate result of a vector operation is also temporarily stored therein, and only the final result of the vector operation is sent to the main storage. Therefore, the vector register is very effective for increasing the transfer rate of data used in the vector operation.
However, the performance of the vector processor is greatly deteriorated when a bank conflict occurs. This fact will be explained below in detail. The main storage of the vector processor is formed of a plurality of banks which can operate in parallel and independently of each other, in order to enhance the rate of data transfer between the main storage and each vector register. The term "bank comflict" means the concentrated access to the same bank. When a bank conflict occurs, reading out of data is serially carried out, and therefore the amount of data transferred between the main storage and vector register in a unit time is decreased. In other words, when successive accesses to the same address are required, a bank conflict occurs, since it is impossible to simultaneously read out a plurality of data from the same location.
For example, in an unstationary, nonlinear analysis, it is required to carry out the triangular decomposition for a band matrix having a small band width, at high speed. In such a vector operation, it frequently happens that the same data is repeatedly used. In this case, the same bank in a main storage is successively accessed, so that a bank conflict occurs, and therefore the processing speed of vector processor is decreased.